CHREC 2009 Projects (F=Florida, B=BYU, G=GWU, V=VT)
F1-09: System-Level Formulation and Design [PDF]
F2-09: Translation and Execution Productivity [PDF]
F4-09: Virtual Architecture and Design Automation for Partial Reconfiguration [PDF]
F5-09: RC Device Architecture Exploration [PDF]
F6-09: Reconfigurable & Hybrid Fault Tolerance [PDF]
B1-09: Reuse Tools for RC Design [PDF]
B5a-09: Reliability Techniques for DSP/Comm Systems [PDF]
B5b-09: Reliable Architectures for Reconfigurable Computing [PDF]
G7-09: Virtualizing FPGA Resources for HPRCs [PDF]
G8-09: Unified Parallel Programming of Tilera using UPC [PDF]
V1-09: Characterizing and Optimizing Emerging Devices [PDF]
V3-09: An API for Autonomous Adaptive Systems [PDF]
CHREC 2008 Projects
F1-08: System-Level Formulation for Algorithm/Architecture Exploration
F2-08: Application Performance Analysis
F3-08: Case Studies in Multi-FPGA Application Design
F4-08: Reconfigurable Fault Tolerance and Partial Reconfiguration
F5-08: Device Characterization & Design Space Exploration
B1-08: Core Library Framework for HPC/HPEC
B2-08: Heterogeneous Architectures for HPEC RC
B3-08: High-Reliability RC Design Tools and Techniques
B4-08: Reliable RC DSP/Comm Systems
G5-08: Library Portability for HLL Acceleration Cores
G6-08: Intelligent Deployment of IP Cores
G7-08: Partial Run-Time Reconfiguration for HPRC
V1-08: Model-Based Engineering Framework for HPRC Applications
V2-08: Process-to-Core Mapping for Advanced Architectures
CHREC 2007 Projects
F1-07: Simulative Performance Prediction
F2-07: Performance Analysis & Profiling
F3-07: Application Case Studies
F4-07: Partial RTR Architecture for Qualified HPEC Systems
F5-07: FPLD Device Architectures and Tradeoffs
G1-07: Profiling Applications for HW/SW Partitioning and Co-scheduling
G4-07: High-Level Languages Productivity - an HPC Perspective
G5-07: Library Portability and Acceleration Cores